INTEGRATED MEMORY CIRCUIT WITH PARALLEL AND SERIAL INPUT AND OUTPUT

Patent №

US 5,014,244

Granted

1991-05-07

Filed 1989

Owner

U.S. PHILIPS CORPORATION, A CORP. OF DE

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07398816

An integrated memory circuit in which memory cells are arranged in rows and columns, each column having a separate sense amplifier. The memory columns can be coupled to neighboring memory columns by additional transistors and the gain of the sense amplifiers in the even and the odd columns is adjustable. Consequently, information can also be serially shifted from one column to another, so that the information can be written and read not only in parallel but also serially.

AI classification

AI hardware0.99
Evolutionary computation0.00
Natural language0.00
Knowledge representation0.00
Machine learning0.00
Vision0.00
Planning0.00
Speech0.00

Ownership

U.S. PHILIPS CORPORATION, A CORP. OF DE

assignment · 52280738

Assignors

LAMMERTS, JUDOCUS A. M., FOSS, RICHARD C., SALTERS, ROELOF H. W.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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