AUTOMATED SYSTEM FOR EXTRACTING DESIGN AND LAYOUT INFORMATION FROM AN INTEGRATED CIRCUIT

A system for extracting design information from a semiconductor integrated circuit (IC) is disclosed. The system includes a microscope and camera for capturing a composite image of the IC in the form of a video signal. Image capture occurs on a section-by-section basis in which a "snapshot" of each section is taken, the die-holding table stepped to a new section, and a snapshot of the new section obtained. This image capture operation continues until a composite image of the IC is obtained by successive capture of contiguous or partially overlapping images covering all of the different sections of the die. An image processor receives the video signal from the optical means and generates an abstract representation of the die in the form of lists of identifying features such as the size, type and relative location of all transistors, and the width, length and relative location of all of the metal interconnects to the IC. These lists are subsequently compared with reference library circuits by a computer to recognize individual circuit cells. Once all of the ciruit cells on the die have been recognized, the computer then generates a schematic netlist of the IC.