A METHOD AND APPARATUS FOR EXCUTING AN OPERATION REQUEST SIGNAL IN A LOOSELY COUPLED PARALLEL COMPUTER HAVING PROCESSOR ELEMENTS CAPABLE OF UPDATING MEMORY CONTENTS AND MINIMIZING EXCLUSIVE CONTROL OF SHARABLE DISTRIBUTED MEMORIES

Patent №

US 5,129,093

Granted

1992-07-07

Filed 1988

Owner

HITACHI, LTD., A CORP. OF JAPAN

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07272550

A parallel computer has an operation request function and a plurality of processor elements. Each processor element has a sharable distributed memory for holding data, and is interconnected to a network to permit communication. Each processor element comprises a request sent unit for sending an operation request message for causing another processor element connected to a memory module to execute a recursive defining operation. The memory module stores data to be recursively defined. Each processor element further comprises an operation request execution element for accepting a message from another processor, temporarily stopping any other operation of the processor element in accordance with the content of the message, and executing the requested operation. Registers are also used for executing the operation requested by the other processor in addition to the general purpose registers and floating point registers.

AI classification

AI hardware0.99
Knowledge representation0.04
Machine learning0.03
Natural language0.00
Planning0.00
Vision0.00
Evolutionary computation0.00
Speech0.00

Ownership

HITACHI, LTD., A CORP. OF JAPAN

assignment · 49760105

Assignors

MURAMATSU, AKIRA, YOSHIHARA, IKUO, NAKAO, KAZUO

On an employer assignment, the assignors are typically the inventors.

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