METHODOLOGY FOR DERIVING EXECUTABLE LOW-LEVEL STRUCTURAL DESCRIPTIONS AND VALID PHYSICAL IMPLEMENTATIONS OF CIRCUITS AND SYSTEMS FROM HIGH-LEVEL SEMANTIC SPECIFICATIONS AND DESCRIPTIONS THEREOF

Patent №

US 5,222,030

Granted

1993-06-22

Filed 1990

Owner

LSI LOGIC CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07507201

A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure. The methodology includes using estimators, based on data gathered over a number of realized designs, for partitioning and evaluating a design prior to logic synthesis. From the structural description, a physical implementation of the device is readily realized.

AI hardwareG01R 31/31704G06F 30/30G06F 30/33G06F 30/3308

AI classification

AI hardware0.99
Knowledge representation0.34
Machine learning0.27
Planning0.11
Natural language0.01
Vision0.00
Evolutionary computation0.00
Speech0.00

Ownership

LSI LOGIC CORPORATION

assignment · 53440643

Assignors

DANGELO, CARLOS, NAGASAMY, VIJAY K., BOOTEHSAZ, AHSAN, RAJAN, SREERANGA P.

On an employer assignment, the assignors are typically the inventors.

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