TIMING CONTROL FOR PRECHARGED CIRCUIT

A timing control for precharged digital circuits to avoid spurious error appearing at the output due to the slow pull-down of the precharged node after precharging. A NAND gate is used to delay the precharged node siganl transmitting to the output stage until the precharged node is fully discharged. This timing control circuit is used to prevent any spurious peaking of the output of an analog-to-digital converter using precharged bit lines.