METHOD AND SYSTEM FOR LOGIC CHANGE IN AN AUTOMATIC LOGIC SYNTHESIS SYSTEM

An automatic logic synthesis method wherein lower-rank descriptions defining a logic device in terms of expressions of lower abstraction are synthesized from higher-rank descriptions defining the logic device in terms of expressions of higher abstraction, comprising: providing first identifiers each of which indicates the presence of a description change of the corresponding description unit data of the higher-rank description, and providing second identifiers each of which indicates the presence of a description change of the corresponding description unit data of the lower-rank description; setting the first identifier of changed description unit data at the change of the higher-rank description, and setting the second identifier of changed description unit at the change of the lower-rank description directly made without any synthesis process from the higher-rank description; originating new lower-rank description unit data from the higher-rank description unit whose first identifier is set; and registering the new lower-rank description unit data as lower-rank description unit data on condition that the second identifier of the current lower-rank description unit data corresponding to the new lower-rank description unit data is not set, and merging the new lower-rank description unit data and the current lower-rank description unit data and then registering a merged result as lower-rank description unit data on condition that the second identifier of the current lower-rank description unit data is set.