DCT PERIPHERAL FOR A DIGITAL SIGNAL PROCESSOR

A discrete cosine transform engine is disclosed. The engine receives an input matrix of data and provides a transformed matrix of data, the input matrix and the output matrix each having a plurality of row locations and a plurality of column locations. The engine includes a plurality of input accumulators and a plurality of output accumulators. The plurality of input accumulators accumulate data from the input matrix of data in parallel to provide a plurality of transform coefficient outputs. A digital signal processor receives the plurality of transform coefficients, multiplies the transform coefficients by a plurality of transform constants and provides a plurality of transform products. Each output accumulator receives the transform products and accumulates the products to provide the transformed matrix of data.