Patent US 5,454,092

An improved internal memory address mapping apparatus repositions a lower priority memory resource when two or more memory resources are located at the same address space. Upon receipt of a signal indicating that two memory resources have been mapped to the same address space, an internal address mapping decoder assigns the conflicting portion of the memory resource with the lower priority a different address range. The portion of the memory resource with the lower priority not conflicting with another memory resource is accessed without being repositioned. This internal memory address mapping apparatus assures that all portions of conflicting memory resources remain accessible to the user.