ASSOCIATIVE MEMORY DEVICE WITH SMALL MEMORY CELLS SELECTIVELY STORING DATA BITS AND DON'T CARE BITS

An associative memory cell is implemented by a series combination of two electrically erasable and programmable read only memory transistors inserted in a potential line and complementarily driven by two data lines for making one of the two electrically erasable and programmable read only memory transistors conductive depending upon the logic level of a registration data bit, and the two data lines make both of the two electrically erasable and programmable read only memory transistors conductive for storing a don't-care bit, thereby decreasing the occupation area assigned to the associative memory cell without sacrifice of usability in the associative operation.