Patent US 5,584,032

A kernel processor system having a buffer memory, a kernel memory, and a kernel processor provides improved kernel processing capability. The disclosed arrangement comprises an input circuit generating input information; a buffer memory storing buffered information; a write address circuit generating write addresses; a buffer memory write access circuit writing buffered information into the buffer memory in response to the input information and in response to the write addresses; a read address circuit generating read addresses; a buffer memory read access circuit generating buffered output information in response to the buffered information and in response to the read addresses; a kernel memory storing a kernel of information in response to the buffered output information; a kernel processor generating filtered output information in response to the kernel of information; and a display monitor displaying a filtered image in response to the filtered output information.