Patent US 6,608,626

An address generator (FIG. 6) of a display controller (16) includes an adder (62) that repetitively adds an image-row-offset value to the address generator's address output so that data sequentially fetched from a refresh memory (18) to refresh a display (20) properly represent the image data even though the display scanning orthogonal to the image data's sequence in the refresh memory. As the data are fetched, an omega network (90) re-orders the bits within the fetched data words in accordance with the current display scan so that the display will receive proper data even though each location contains data for a plurality of pixels in an orthogonally oriented image row.