METHOD AND APPARATUS FOR CONTROLLING INSTRUCTION IN PIPELINE PROCESSOR

A pipeline processor for processing instruction fetch prior to execution of the instruction based on the content of branch history for storing history of the result of execution of branch instructions includes an address generating section, branch history retrieving section, prefetch address holding section and instruction fetch section. The branch history retrieving section determines whether each of addresses sequentially generated from the address generating section hits the branch history or not. When an instruction stored in the address hits the branch history, the branch history retrieving section supplies the content of the branch history to the prefetch address holding section. When the branch history retrieving section is hit, the prefetch address holding section holds the branching-destination address of the branch instruction until the instruction is fetched by the instruction fetch section. If an instruction fetched in a preceding cycle hits the branch history, the instruction fetch section fetches an instruction of an address held in the prefetch address holding section, and if the instruction fetched in a preceding cycle does not hit the branch history, the instruction fetch section fetches an instruction of an address generated from the address generating section.