METHOD AND APPARATUS FOR A TRACE BUFFER IN AN EMULATION SYSTEM

Patent №

US 5,680,583

Granted

1997-10-21

Filed 1994

Owner

ARKOS DESIGN, INC.

+1 more

Lab

—

AI components

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08197430

A tracing method and apparatus for a digital emulation system. The invention allows trace information to be obtained during the emulation of a digital circuit that includes a clock signal. Input signal states are sensed and stored each clock cycle. The internal state of the emulated digital circuit is also stored. By using the stored input signal states and internal states, the states of other signals in the emulated digital circuit are derived.

AI hardwareG06F 11/261G06F 11/2268G06F 11/3466G06F 30/33

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AI classification

AI hardware0.95

Planning0.04

Knowledge representation0.01

Natural language0.00

Vision0.00

Evolutionary computation0.00

Machine learning0.00

Speech0.00

Ownership

ARKOS DESIGN, INC.

assignment · 77410336

QUICKTURN DESIGN SYSTEMS, INC.

assignment · 86440821

Assignors

KUIJSTEN, HANS

On an employer assignment, the assignors are typically the inventors.

Cites (30)

HIGH SPEED LOGIC SIMULATION SYSTEM USING TIME DIVISION EMULATION SUITABLE FOR LARGE SCALE LOGIC CIRCUITSUS 5,572,710 · 1996 MULTIPROCESSOR FOR HARDWARE EMULATIONUS 5,551,013 · 1996 TEST GENERATION BY ENVIRONMENT EMULATIONUS 5,475,624 · 1995 HIERARCHICALLY CONNECTED RECONFIGURABLE LOGIC ASSEMBLYUS 5,452,231 · 1995 PARTIAL CROSSBAR INTERCONNECT ARCHITECTURE FOR RECONFIGURABLY CONNECTING MULTIPLE REPROGRAMMABLE LOGIC DEVICES IN A LOGIC EMULATION SYSTEMUS 5,448,496 · 1995 SIMULATION USING COMPILED FUNCTION DESCRIPTION LANGUAGEUS 5,437,037 · 1995 PSEUDO-LSI DEVICE AND DEBUGGING SYSTEM INCORPORATING SAMEUS 5,386,550 · 1995 PROGRAMMABLE LOGIC DEVICEUS 5,377,123 · 1994 RECONFIGURABLE HARDWARE EMULATION SYSTEMUS 5,329,470 · 1994 HIGH SPEED MICROCOMPUTER IN-CIRCUIT EMULATORUS 5,321,828 · 1994 HIGH SPEED LOGIC SIMULATION SYSTEM WITH STIMULUS ENGINE USING INDEPENDENT EVENT CHANNELS SELECTIVLY DRIVEN BY INDEPENDENT STIMULUS PROGRAMSUS 5,126,966 · 1992 APPARATUS FOR EMULATION OF ELECTRONIC HARDWARE SYSTEMUS 5,109,353 · 1992 SIMULATION MODEL GENERATION FROM A PHYSICAL DATA BASE OF A COMBINATORIAL CIRCUITUS 5,084,824 · 1992 EVENT-CONTROLLED LCC SIMULATIONUS 5,068,812 · 1991 METHOD OF USING ELECTRONICALLY RECONFIGURABLE LOGIC CIRCUITSUS 5,036,473 · 1991 AUTOMATIC GENERATION METHOD OF A SIMULATION PROGRAM FOR NUMERICALLY SOLVING A PARTIAL DIFFERENTIAL EQUATION ACCORDING TO A BOUNDARY-FITTED METHODUS 4,972,334 · 1990 MASSIVELY DISTRIBUTED SIMULATION ENGINEUS 4,914,612 · 1990 ARRA FOR SIMULATING COMPUTER FUNCTIONS FOR LARGE COMPUTER SYSTEMSUS 4,819,150 · 1989 DUAL DELAY MODE PIPELINED LOGIC SIMULATORUS 4,787,061 · 1988 GLITCH DETELCTION BY FORCING THE OUTPUT OF A SIMULATED LOGIC DEVICE TO AN UNDFEFINED STATEUS 4,787,062 · 1988 LOGICAL GROUPING OF FACILITIES WITHIN A COMPUTER DEVELOPMENT SYSTEMUS 4,782,461 · 1988 DIGITAL SYSTEM SIMULATION METHOD AND APPARATUSUS 4,725,971 · 1988 DIGITAL SYSTEM SIMULATION METHOD AND APPARATUS HAVING IMPROVED SAMPLINGUS 4,695,968 · 1987 LOGIC SIMULATION MACHINEUS 4,656,580 · 1987 PROCESSOR FOR SIMULATING DIGITAL STRUCTURESUS 4,587,625 · 1986

and 5 more

Cited by (58)

HARDWARE EMULATION METHOD AND SYSTEM USING A PORT TIME SHIFT REGISTERUS 9,171,111 · 2015 METHODS AND DEVICES FOR TREATING AND PROCESSING DATAUS 9,075,605 · 2015 LOGICAL CELL ARRAY AND BUS SYSTEMUS 9,047,440 · 2015 System and Method Incorporating An Arithmetic Logic Unit For EmulationUS 9,015,026 · 2015 DATA PROCESSING METHOD AND DEVICE

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