CMOS LEVEL SHIFTING CIRCUIT

A level shifting inverter is provided with first and second drivers which may be level shifting inverters, which each have a low enable input, a high enable input and an output. Each driver outputs a low voltage level or a second high voltage level(that is higher than a first high voltage level of an input signal) depending on enabling and disabling voltage levels received at the high and low enable inputs of each driver. The high enable input of the first and second drivers are connected in a cross-coupled feedback configuration. The input of the first driver receives a complement of the input signal whereas the input of the second driver receives the input signal. The level shifter also has transition driver circuitry. The transition driver circuitry has an input receiving the second high voltage level, a first biasing input receiving the input signal and a second biasing input receiving the complement of the input signal. The transition driver circuitry responds to an input signal voltage level transition by charging the output of a first one of the first and second drivers to approximately the second high voltage level and discharging, to the low voltage level, the output of a second one of the first and second drivers. The charging and discharging of the first and second driver outputs causes a disabling voltage level to be outputted to the high enable input of the first one of the first and second drivers and an enabling voltage level to be outputted to the high enable input of the second one of the first and second drivers.