ADAPTIVE INCREMENTAL PLACEMENT OF CIRCUITS ON VLSI CHIP

A computer implemented method incrementally updates a design placement in a very large scale integrated (VLSI) chip. A data structure is generated which defines a chosen specification and initial placement of circuits is input to a computer aided design (CAD) system. The CAD system divides a design area into placement cells. Local constraint values and limits are computed and changes made in the design specification. Replacement regions are then identified, expanded, and replaced. Constraint values are recomputed and the steps of the method are repeated until no more changes are required.