Patent US 5,774,705

A computer/disk storage system enables data to be transferred between a memory and either one of a pair of buses. The system includes a pair of logic networks. The first logic network enables data to be transferred between the memory and a first one of the buses in response to a first bus availability signal. The first logic network also provides a second bus availability signal indicating when the memory is available to transfer data between such memory and the second one of the buses. A second logic network enables data to be transferred between the memory and the second one of the buses in response to the second bus availability signal. The second logic network also provides the first bus availability signal indicating when the memory is available to transfer data between such memory and the second one of the buses. A clock pulse generator has a pair of oscillators for producing clock pulses from one of the pair of oscillators. When one of the pair of oscillators becomes defective, clock pulses are produced from the other one of the pair of oscillators. The network includes a multiplexer having: a first input fed a first one of the pair of oscillators; a second input fed the other one of the pair of oscillators; and, a control signal input fed by a control signal. The multiplexer feeds signals from either the first oscillator or the second oscillator to an output of the multiplexer selectively in accordance with the control signal.