Patent US 5,809,271

A simplified method and apparatus for handling the change of instruction control flow in a microprocessor is provided. Rather than attempting to implement a change in the instruction flow immediately, the processor first recognizes that flow is to be redirected from a predicted instruction flow to a correct instruction flow according to a flow control indicator. The flow control indicator may be attached to instructions flowing down the pipeline or inserted as a separate instruction in the pipeline. The pipeline is cleared of state created by instructions that do not follow the correct instruction flow, i.e., instructions that were erroneously fetched after the instruction causing the change in flow. The change in flow as indicated by the flow control indicator is implemented later in the pipeline.