Patent №
US 5,822,752
Granted
1998-10-13
Filed 1996
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08680745
The present invention is related to a circuit useful to manage a random order queue having a plurality of queue entries, each queue entry having an associated validity bit which indicates whether the queue entry contains valid data. In one embodiment, the circuit includes a first plurality of inputs for receiving validity signals responsive to a first group of validity bits, a second plurality of inputs for receiving shift signals responsive to a second group of validity bits, and a plurality of outputs for providing select signals to multiplexers coupled to the queue, the select signals being responsive to the shift signals and the validity signals.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 81060438
Assignors
CHEONG, HOICHI, CIRAULA, MICHAEL KEVIN, LE, HUNG QUI, MUHICH, JOHN STEPHEN
On an employer assignment, the assignors are typically the inventors.