LATCH CIRCUIT FOR RECEIVING SMALL AMPLITUDE SIGNALS

The latch circuit having an input stage supplied with an input signal and, when activated, producing an output signal responsive to the input signal, and an latching stage coupled to the input stage and, when activated, holding a level of the output signal, the input stage including a pair of bipolar transistors Q1, Q2 coupled in a differential form, the latching stage including a pair of insulated gate field effect transistors M1, M2 coupled in a differential form.