CMOS OUTPUT BUFFER WITH SLEW RATE CONTROL

Patent №

US 5,877,647

Granted

1999-03-02

Filed 1996

Owner

TEXAS INSTRUMENTS INCORPORATED

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08732549

An output buffer 10 of an integrated circuit controls the slew rate of an output signal in order to minimize electro-magnetic interference. Transient current delay circuits 132 and 134 provide a delay between turning off pull down circuit 122 and turning on pull up circuit 124, and vice versa, in order to assure that driver overlap does not occur. Pull up circuit 124 selectively switches a plurality of output transistors P(n) in order to control the rise time of an output signal. Likewise, pull down circuit 122 selectively switches a plurality of output transistors N(n) in order to control the fall time of an output signal so that current spikes on supply lines to output buffer 10 are reduced or eliminated.

PlanningH03F 1/523H03K 19/00361H03F 2200/114

AI classification

Planning0.56
AI hardware0.47
Vision0.00
Machine learning0.00
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Ownership

TEXAS INSTRUMENTS INCORPORATED

assignment · 82980160

Assignors

VAJAPEY, SRIDHAR, PHAM, LUAT Q.

On an employer assignment, the assignors are typically the inventors.

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