Patent №
US 5,880,967
Granted
1999-03-09
Filed 1995
Owner
EPIC DESIGN TECHNOLOGY, INC.
+1 more
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08431988
A method for minimizing signal delay and power consumption is provided. Through combined power simulation and delay analysis, iterative transistor resizing is performed based on a variety of factors including relative delay of associated circuit paths, nodal switching activities and association of transistors in channel-connected sets.
AI classification
AI hardware0.58
Speech0.00
Machine learning0.00
Natural language0.00
Evolutionary computation0.00
Vision0.00
Knowledge representation0.00
Planning0.00
Ownership
EPIC DESIGN TECHNOLOGY, INC.
assignment · 75430728
SYNOPSYS, INC.
assignment · 86440910
Assignors
JYU, HENRY HORNG-FEI, DENG, AN-CHANG
On an employer assignment, the assignors are typically the inventors.