Patent №
US 7,653,889
Granted
2010-01-26
Filed 2006
Owner
FUJITSU LIMITED
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11524342
An apparatus includes: a detecting unit that detects a target path from among a plurality of paths in a target circuit based on a result of a delay analysis of the target circuit, wherein the result of the delay analysis includes delay data of a first circuit component of the target path; an extracting unit that extracts delay data of a second circuit component having an identical type to that of the first circuit component; and a generating unit that generates a directive for replacing the first circuit component with the second circuit component.
AI classification
Ownership
FUJITSU LIMITED
assignment · 183330180
Assignors
NITTA, IZUMI, SHIBUYA, TOSHIYUKI, HOMMA, KATSUMI, MATSUOKA, HIDETOSHI
On an employer assignment, the assignors are typically the inventors.