METHOD AND APPARATUS FOR DECREASING THREAD SWITCH LATENCY IN A MULTITHREAD PROCESSOR

Patent №

US 5,907,702

Granted

1999-05-25

Filed 1997

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08829518

The method and apparatus for decreasing thread switch latency in a multithread processor stores instructions for an active thread in a primary instruction queue, and stores instructions for a dormant thread in a thread switch instruction queue. The active thread is the thread currently being processed by the multithread processor, while the dormant thread is a thread not currently being executed by the multithread processor. During execution of the active thread, instructions are dispatched from the primary instruction queue for processing. When a thread switch occurs, instructions are dispatched from the thread switch instruction queue for execution. Simultaneously, instructions stored in the thread switch instruction queue are transferred to the primary instruction queue. In this manner, the thread switch latency resulting from the amount of time to refill the primary instruction queue with instructions of the dormant thread is eliminated.

AI hardwareG06F 9/3814G06F 9/3802G06F 9/3851G06F 9/461

AI classification

AI hardware0.99
Planning0.16
Natural language0.00
Knowledge representation0.00
Vision0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 84990054

Assignors

FLYNN, WILLIAM THOMAS, HILLIER, PHILIP ROGERS III.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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