SYNCHRONOUS MEMORY TESTER

Patent №

US 5,914,902

Granted

1999-06-22

Filed 1998

Owner

TANISYS TECHNOLOGY, INC.

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09115386

An automated, portable, and time conservative memory test system for identifying test parameters including type, control line configuration, depth, width, access time, and burst features of any one of a wide variety of synchronous memories including SDRAMs and SGRAMs, and whether an IC chip, bank, board or module, without requiring hardware modifications or additions to the memory device being identified, and without requiring storage of test patterns or characterizing data in the memory device.

PlanningG11C 29/021G01R 31/31908G01R 31/31914G01R 31/31915G11C 29/02G11C 29/10G11C 29/44G11C 29/50+5 more

AI classification

Planning0.68
AI hardware0.03
Speech0.02
Natural language0.01
Evolutionary computation0.00
Machine learning0.00
Knowledge representation0.00
Vision0.00

Ownership

TANISYS TECHNOLOGY, INC.

assignment · 93330278

Assignors

LAWRENCE, ARCHER RUSSELL, LITTLE, JACK C.

On an employer assignment, the assignors are typically the inventors.

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