DEVICE AND METHOD TO REDUCE POWER CONSUMPTION IN INTEGRATED SEMICONDUCTOR DEVICES USING A LOW POWER GROGGY MODE
Patent №
US 6,097,243
Granted
2000-08-01
Filed 1998
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09159861
According to the preferred embodiment, a device and method for reducing power consumption by reducing unneeded node toggling is provided. The preferred embodiment reduces unneeded node toggling in a circuit by utilizing either a pull-up or pull-down transistor to pull the input of the circuit to a state that minimizes power consumption during periods in which the circuit is inactive. By tying the circuit input high or low during inactivity, node toggling is reduced or eliminated in that circuit. In the preferred embodiment, the inputs to the circuit all pulled after a time of inactivity which is proportional to the leakage current of the leakiest transistor in the circuit. By timing the input pulling proportional to the leakage current, the power consumption is minimized without excessive power loss caused by the pulling itself.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 94810741
Assignors
BERTIN, CLAUDE L., TONTI, WILLIAM R. P., DEAN, ALVAR A., PRICER, WILBUR D., PERRY, PATRICK E., GOODNOW, KENNETH J., VENTRONE, SEBASTIAN T.
On an employer assignment, the assignors are typically the inventors.