MECHANISM FOR DYNAMICALLY ADAPTING THE COMPLEXITY OF A MICROPROCESSOR

A complexity-adaptive hardware/software system and method for a microprocessor to execute any of a plurality of diverse applications according to a predetermined instruction set architecture. The system includes dynamic hardware structures and configurable clocking system of the microprocessor for executing any particular application among the plurality of diverse applications, the dynamic hardware structures and configurable clocking system being adaptable to be organized in any of a plurality of potential configurations which are selectable according to the particular application to be executed. Configuration control is performed in response to the particular application to be executed, the instruction set architecture, and the potential configurations in which the dynamic hardware structures and configurable clocking system may be organized. The control is exercised by configuring an organization of the dynamic hardware structures and configurable clocking system to match the particular application to be executed during execution thereof. The dynamic hardware structures and configurable clocking system are reconfigured to a different organization for a match when another application is being executed, or even in the course of execution of the same application. In this way, the hardware implementation is adaptive to optimize performance of the microprocessor according to each particular application being executed among the plurality of diverse applications that may be executed.