METHOD AND APPARATUS FOR PERFORMING POWER MANAGEMENT BY SUPPRESSING THE SPECULATIVE EXECUTION OF INSTRUCTIONS WITHIN A PIPELINED MICROPROCESSOR

Patent №

US 6,282,663

Granted

2001-08-28

Filed 1997

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08787549

A method for reducing power consumption within a processor, having branch prediction circuitry, requires detecting the occurrence of a trigger event and then suppressing speculative execution of an instruction within the processor in response to the detection of the trigger event. The trigger event is the transcendence of a predetermined thermal threshold by the operating temperature of the processor.

AI hardwareG06F 9/3844G06F 1/32G06F 1/3243G06F 9/3806G06F 9/3842Y02D 10/00

AI classification

AI hardware0.87
Knowledge representation0.02
Planning0.01
Natural language0.01
Machine learning0.00
Speech0.00
Evolutionary computation0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 83810393

Assignors

ZHAZAM, JONATHAN

On an employer assignment, the assignors are typically the inventors.

From the same owner

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