Patent №
US 6,292,855
Granted
2001-09-18
Filed 1998
Owner
LSI LOGIC CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09217974
A set of registers are provided for a protocol engine driving I/O transactions requested by a host. A fixed set of defined data elements are determined for the protocol under which the I/O transaction is to be performed. Each register maps to a data structure base address or to a different data element offset or byte count. During initialization, the registers are programmed by an operating system device driver with offsets from a base address and byte counts for each data element within the defined set as those data elements are found within an operating system specific data structure for the I/O transaction, although data elements having a fixed size for each operating system may not require the byte count to be specified. For each I/O transaction requested, the base address in the host memory of the operating system specific data structure is programmed by the device driver into a register. The I/O protocol engine utilizes the base address together with the offset and byte count information to commence the requested I/O transaction. The base address is programmed by the device driver into the appropriate register on an each I/O basis, without requiring translation of the entire data structure. By permitting the hardware to be configured to effectively utilize the operating system data structure, the need for data structure translation is eliminated, CPU utilization is reduced, and increased I/O throughput is achieved.
AI classification
Ownership
LSI LOGIC CORPORATION
assignment · 98710824
Assignors
JOHNSON, RUSSELL A., BROWN, ANDREW C., JOHNSON, STEPHEN B.
On an employer assignment, the assignors are typically the inventors.