SYSTEM AND METHOD FOR SYNCHRONIZING INSTRUCTION EXECUTION WITH EXTERNAL EVENTS

An apparatus and method of synchronizing instruction execution in the apparatus with external events. The apparatus may be a processor or microprocessor capable of executing a function specific wait state that is dependant upon a type specified by an instruction field. The processor includes an event counter that maintains an event occurrence count, an instruction parser that strips the instruction type and event count from instructions and passes the stripped information to a comparator. The comparator compares the stripped information against an event count. The instruction types include: a relative type indicating execution at some event occurrence subsequent to the present cycle; a direct type indicating an absolute event occurrence count for execution; and a event range indicating a range of event occurrences wherein execution is valid.