Patent №
US 6,301,705
Granted
2001-10-09
Filed 1998
Owner
INSTITUTE FOR THE DEVELOPMENT OF EMERGING ARCHITECTURES, L.L.C.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09164327
The present invention is generally directed to a system and method for supporting speculative execution of an instruction set for a central processing unit (CPU) including non-speculative and speculative instructions. In accordance with one aspect of the invention a method includes the steps of evaluating the instructions of the program to determine whether the individual instructions are speculative or non-speculative, and assessing each of the speculative instructions to determine whether it generates an exception. For each of the speculative instructions that generates an exception, the method then encode a deferred exception token (DET) into an unused register value of a register of the CPU. In accordance with another aspect of the invention, a system is provided, which system includes circuitry configured to evaluate the instructions of the instruction set to determine whether the individual instructions are speculative or non-speculative. The system further includes circuitry configured to assess each of the speculative instructions to determine whether it generates an exception. Finally, the system further includes circuitry configured to encode a deferred exception token (DET) into an unused register value of a register of the (CPU.
AI classification
Ownership
INSTITUTE FOR THE DEVELOPMENT OF EMERGING ARCHITECTURES, L.L.C.
assignment · 97570213
Assignors
DOSHI, GAUTAM B., MARKSTELN, PETER, KARP, ALAN H., HUCK, JEROME D., COLON-BONET, GLENN T., MORRISON, MICHAEL
On an employer assignment, the assignors are typically the inventors.