CACHING METHOD USING CACHE DATA STORED IN DYNAMIC RAM EMBEDDED IN LOGIC CHIP AND CACHE TAG STORED IN STATIC RAM EXTERNAL TO LOGIC CHIP

A caching method for using cache data stored in dynamic RAM embedded in a logic chip and cache tags stored in static RAM external to the logic chip. In general, there are at least two cache applications where this method can be employed. First, there are caches integral to a processor and interfaced to a processor pipeline. Second, there are caches external to a processor and interfaced with a shared bus.