METHOD AND APPARATUS FOR YIELD AND FAILURE ANALYSIS IN THE MANUFACTURING OF SEMICONDUCTORS

Patent №

US 6,477,685

Granted

2002-11-05

Filed 2000

Owner

TEXAS INSTRUMENTS INCORPORATED

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09668566

A yield and failure analysis system having composite wafermaps provides the ability to view numerous lots on a single screen, identifying the semiconductor manufacturing process, which caused wafer failures and the associated malfunctioning equipment. A wafer inspection instrumentation (28) probes each wafer within a given lot and applies a series of tests. Wafer defect data is stored in a first relational database (46) for compiling a composite wafermap for each lot. Collected wafer defect data is converted into a FFT signature. Present wafer defect data is compared with stored converted wafer defect data patterns to generate correlation coefficients. When the correlation coefficients are within a predetermined range, the converted wafer defect data pattern is stored in the second relational database (47). Data may be accessed from both databases by a user interface (44), enabling the user to analyze data in real time and generate reports.

PlanningH01L 22/20H10P 74/23

AI classification

Planning1.00
AI hardware0.38
Machine learning0.28
Vision0.05
Natural language0.00
Evolutionary computation0.00
Knowledge representation0.00
Speech0.00

Ownership

TEXAS INSTRUMENTS INCORPORATED

assignment · 111990776

Assignors

LOVELACE, JEROME R.

On an employer assignment, the assignors are typically the inventors.

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