Patent №
US 6,496,038
Granted
2002-12-17
Filed 2000
Owner
INTEL CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09608857
A pulsed circuit topology including a pulsed domino flip-flop. A circuit includes a domino logic gate having a domino output node responsive to input data during an evaluate pulse. Reset circuitry initiates and self-terminates a reset pulse during which the domino output node is precharged. A latch responsive to a first pulsed clock input signal is provided to latch data indicated at the domino output node.
AI classification
AI hardware0.72
Machine learning0.09
Natural language0.00
Knowledge representation0.00
Evolutionary computation0.00
Planning0.00
Speech0.00
Vision0.00
Ownership
INTEL CORPORATION
assignment · 109350001
Assignors
SPARGUE, MILO D., KUMAR, RAJESH, MURRAY, ROBERT J.
On an employer assignment, the assignors are typically the inventors.
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