FABRICATION TECHNIQUES FOR ADDRESSING CROSS-POINT DIODE MEMORY ARRAYS

Patent №

US 6,552,409

Granted

2003-04-22

Filed 2001

Owner

HEWLETT-PACKARD COMPANY

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09875572

A memory array and some addressing circuitry therefor are formed by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. The circuit elements formed at the crossing-points function as data storage devices in the memory array, and function as connections for a permuted addressing scheme for addressing the elements in the array. In order to construct the addressing circuitry, the electrode conductors are fabricated with a controlled geometry at selected crossing-points such that selected circuit elements have increased or decreased cross-sectional area. By applying a programming electrical signal to the electrodes, the electrical characteristics (e.g. resistance) of selected circuit elements can be changed according to the controlled electrode geometry.

AI hardwareG11C 8/10B82Y 10/00G11C 17/16H01L 23/5256H01L 23/5382H01L 25/105H10W 20/493H10W 70/611+12 more

AI classification

AI hardware0.98
Natural language0.00
Vision0.00
Machine learning0.00
Planning0.00
Knowledge representation0.00
Evolutionary computation0.00
Speech0.00

Ownership

HEWLETT-PACKARD COMPANY

assignment · 122360022

SAMSUNG ELECTRONICS CO., LTD.

assignment · 259200001

Assignors

TAUSSIG, CARL P., ELDER, RICHARD

On an employer assignment, the assignors are typically the inventors.

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