METHOD FOR DEADLOCK-FREE CONFIGURATION OF DATAFLOW PROCESSORS AND MODULES WITH A TWO-OR MULTIDIMENSIONAL PROGRAMMABLE CELL STRUCTURE (FPGAS, DPGAS, ETC.)

A method of deadlock-free, automatic configuration and reconfiguration of modules having a two- or multidimensional cell arrangement, in which a unit for controlling the configuration and reconfiguration manages a set of associated configurable elements, the set being a subset or the total set of all configurable elements, and the management takes place as follows: reconfiguration requests from the associated configurable elements are sent to the unit; the unit processes the requests; the unit processes the configuration data of the command sequence; and after the configuration data has been fully processed, new requests are accepted again, the configuration data still to be loaded of the existing previous requests being loaded from a buffer memory (FILMO) into the configurable elements until a new request occurs.