Patent №
US 6,629,232
Granted
2003-09-30
Filed 2000
Owner
INTEL CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09609911
Interconnect-dominated large register files are reduced in chip area and delay time. A register file in a processor having a number of execution units is divided into multiple copies. Different groups of execution units can read from and write to their own copy of the file registers by a set of local read and write ports. All of the register-file copies are synchronized by writing data from the execution units to remote write ports in at least some registers in other copies of the register file. Each copy can be divided into local and global registers. While all copies of the global registers continue to be written by the remote write ports, the local registers can be written only by a local cluster of execution units. Alternatively or additionally, all of the execution units can write to their local register-file copy, but only some of the units can write the global registers in all copies of the register file.
AI classification
Ownership
INTEL CORPORATION
assignment · 116910482
Assignors
ARORA, KEN, SHARANGPANI, HARSHVARDHAN, GUPTA, RAJIV
On an employer assignment, the assignors are typically the inventors.