TRIPLE REDUNDANT SELF-SCRUBBING INTEGRATED CIRCUIT

Patent №

US 6,637,005

Granted

2003-10-21

Filed 2000

Owner

HUGHES ELECTRONICS CORPORATION

Lab

AI components

1

ml

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09516260

A fault tolerant integrated circuit employs triple redundant storage of data and continuous voting to protect the data from Single Event Upset, or SEU. The integrated circuit includes three or more registers and a majority voter. The three registers are connected in series to each other with the output of the first register being connected to the input of the second register and the output of the second register being connected to the input of the third register. The majority voter is connected to the output of each register and generates a signal corresponding to the majority of all of the register outputs. The output of the majority voter is connected to the input of the first register, thereby correcting any incorrect data stored in the registers.

AI classification

Machine learning0.59
Planning0.22
AI hardware0.09
Vision0.01
Natural language0.00
Evolutionary computation0.00
Knowledge representation0.00
Speech0.00

Ownership

HUGHES ELECTRONICS CORPORATION

assignment · 106580229

Assignors

KOHNEN, KIRK

On an employer assignment, the assignors are typically the inventors.

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