RUNTIME CONFIGURABLE ARITHMETIC AND LOGIC CELL

Patent №

US 6,728,871

Granted

2004-04-27

Filed 1999

Owner

PACT GMBH

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09329132

A cascadable arithmetic and logic unit (ALU) which is configurable in function and interconnection. No decoding of commands is needed during execution of the algorithm. The ALU can be reconfigured at run time without any effect on surrounding ALUs, processing units or data streams. The volume of configuration data is very small, which has positive effects on the space required and the configuration speed. Broadcasting is supported through the internal bus systems in order to distribute large volumes of data rapidly and efficiently. The ALU is equipped with a power-saving mode to shut down power consumption completely. There is also a clock rate divider which makes it possible to operate the ALU at a slower clock rate. Special mechanisms are available for feedback on the internal states to the external controllers.

Machine learningAI hardwareG06F 1/12B01J 19/088C01B 13/11G06F 1/3203G06F 1/3237G06F 9/3001G06F 9/30101G06F 9/30134+11 more

AI classification

AI hardware1.00
Machine learning0.67
Vision0.01
Speech0.00
Natural language0.00
Evolutionary computation0.00
Knowledge representation0.00
Planning0.00

Ownership

PACT GMBH

assignment · 103890693

Assignors

VORBACH, MARTIN, MUNCH, ROBERT

On an employer assignment, the assignors are typically the inventors.

From the same owner

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