METHOD AND APPARATUS FOR PRIORITY TRACKING IN AN OUT-OF-ORDER INSTRUCTION SHELF OF A HIGH PERFORMANCE SUPERSCALAR MICROPROCESSOR
Patent №
US 6,785,802
Granted
2004-08-31
Filed 2000
Owner
STMICROELECTRONICS, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09585076
A microprocessor and associated method includes a plurality of resources for executing instructions, and an out-of-order instruction shelf for priority/age tracking of the instructions. The instruction shelf has an instruction pool with a plurality of slots therein for storing respective instructions, and an instruction age tracker for storing therein a matrix of rows and columns of logic states associated with relative ages of instructions. The logic states in a given column and row of the matrix are associated with a respective slot of the instruction pool. Also, the microprocessor includes an instructions scheduler for performing at least one logic function on each column of the matrix to determine an oldest instruction, for dispatching instructions to the plurality of resources based thereon, and for updating the matrix based upon dispatched instructions.
AI classification
Ownership
STMICROELECTRONICS, INC.
assignment · 108730836
Assignors
ROY, PROTIP
On an employer assignment, the assignors are typically the inventors.