WRITE ONCE READ ONLY MEMORY EMPLOYING CHARGE TRAPPING IN INSULATORS

Patent №

US 6,804,136

Granted

2004-10-12

Filed 2002

Owner

MICRON TECHNOLOGY, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10177077

Structures and methods for write once read only memory employing charge trapping in insulators are provided. The write once read only memory cell includes a metal oxide semiconductor field effect transistor having a first source/drain region, a second source/drain region, a channel region between the first and the second source/drain regions, and a gate separated from the channel region by a gate insulator. A plug couples the first source/drain region to an array plate. A bitline is coupled to the second source/drain region. The MOSFET can be programmed by operation in a reverse direction trapping charge in the gate insulator adjacent to the first source/drain region such that the programmed MOSFET operates at reduced drain source current when read in a forward direction.

AI hardwareH10D 64/037G11C 16/0466H10B 20/00H10B 20/25H10D 30/69G11C 16/28G11C 2216/26

AI classification

AI hardware0.58
Vision0.00
Machine learning0.00
Speech0.00
Knowledge representation0.00
Evolutionary computation0.00
Natural language0.00
Planning0.00

Ownership

MICRON TECHNOLOGY, INC.

assignment · 130320346

Assignors

FORBES, LEONARD

On an employer assignment, the assignors are typically the inventors.

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