DIRECT MEMORY ACCESS CONTROLLER AND METHOD OF FILTERING DATA DURING DATA TRANSFER FROM A SOURCE MEMORY TO A DESTINATION MEMORY

Patent №

US 6,904,473

Granted

2005-06-07

Filed 2002

Owner

XYRATEX

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10209572

A direct memory access controller includes a source memory controller for controlling a source memory, a destination bus controller for controlling the transfer of data to a destination memory, a first-in-first-out memory buffer for receiving data from the source memory, and a filter connected upstream of the first-in-first-out memory buffer for comparing the source memory data to a filter criterion and passing to the first-in-first-out memory buffer only that data which matches the filter criterion.

AI hardwareG06F 13/28Y10S 707/99933Y10S 707/99936

AI classification

AI hardware0.92
Planning0.24
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Knowledge representation0.00
Speech0.00
Natural language0.00

Ownership

XYRATEX

assignment · 131670092

Assignors

BLOXHAM, CHRISTOPHER, RICKARD, KATHRYN E.

On an employer assignment, the assignors are typically the inventors.

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