CONTROLLING A PROCESSOR RESOURCE BASED ON A COMPILE-TIME PREDICTION OF NUMBER OF INSTRUCTIONS-PER-CYCLE THAT WILL BE EXECUTED ACROSS PLURAL CYCLES BY THE PROCESSOR

Patent №

US 6,934,865

Granted

2005-08-23

Filed 2002

Owner

MASSACHUSETTS, UNIVERSITY OF

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10191775

A method, for use in a processor, includes estimating a number of instructions-per-cycle that will be executed by the processor based on static compile-time information extracted during compilation, and controlling a resource of the processor based on the estimated number of instructions-per-cycle. The resource may be a component of the processor that is controlled by throttling or deactivating the component.

AI hardwareG06F 9/3802G06F 1/3203G06F 1/324G06F 1/3287G06F 1/329G06F 1/3296G06F 8/4432Y02D 10/00+1 more

AI classification

AI hardware0.91
Planning0.13
Evolutionary computation0.05
Knowledge representation0.01
Natural language0.00
Speech0.00
Machine learning0.00
Vision0.00

Ownership

MASSACHUSETTS, UNIVERSITY OF

assignment · 138530065

Assignors

MORITZ, CSABA ANDRAS, KRISHNA, C MANI, KOREN, ISRAEL, UNSAUL, OSMAN

On an employer assignment, the assignors are typically the inventors.

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