ULTRA LOW POWER ADDER WITH SUM SYNCHRONIZATION

Patent №

US 6,990,509

Granted

2006-01-24

Filed 2002

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10093973

An ultra low power adder with sum synchronization which provides a power reduction method in the binary carry propagate adders by using a carry skip technique. The invention eliminates glitches at the adder outputs by preventing signal transitions at the sum outputs until the corresponding carry signals have reached their final values, which is achieved by adding a synchronization circuitry to the sum calculation path.

AI classification

AI hardware0.98
Speech0.00
Evolutionary computation0.00
Knowledge representation0.00
Natural language0.00
Machine learning0.00
Planning0.00
Vision0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 126920919

Assignors

HOKENEK, ERDEM, LISUWANDI, EKO, MELTZER, DAVID, MOUDGILL, MAYAN, ZYUBAN, VICTOR V.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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