DYNAMIC GATE WITH CONDITIONAL KEEPER FOR SOFT ERROR RATE REDUCTION

Patent №

US 7,053,663

Granted

2006-05-30

Filed 2002

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10107779

A dynamic logic gate with a conditional keeper, the conditional keeper comprising a pMOSFET pull-up that switches ON only after the dynamic logic gate completes an evaluation so as to avoid contention with the pull-down network. By sizing the conditional keeper to be stronger than the half-keeper, embodiments may realize a significant reduction in soft error rates that are latched.

AI hardwareH03K 19/0963G11C 5/005

AI classification

AI hardware0.97
Planning0.00
Machine learning0.00
Natural language0.00
Speech0.00
Evolutionary computation0.00
Vision0.00
Knowledge representation0.00

Ownership

INTEL CORPORATION

assignment · 127150805

Assignors

HAZUCHA, PETER, ALVANDPOUR, ATILA, KRISHNAMURTHY, RAM K., KARNIK, TANAY

On an employer assignment, the assignors are typically the inventors.

From the same owner

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