Patent №
US 7,053,664
Granted
2006-05-30
Filed 2002
Owner
INTRINSITY, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
10300289
Power consumption in NDL designs utilizing FAST14 technology can be controlled via the introduction and propagation of null value 1-of-N signals in selected areas of the logic. A shared logic tree circuit, which might perform an arithmetic function or a multiplexing function, evaluates a 1-of-N input logic signal and produces a 1-of-N output logic signal having a null value if the input has a null value. A null value signal is defined as a valid multiwire 1-of-N signal used in NDL logic having N wires where N is greater than 2, where no one of the N wires of the 1-of-N signal is asserted when the NDL gate evaluates.
AI classification
Ownership
INTRINSITY, INC.
assignment · 159190747
Assignors
POTTER, TERENCE M, BLOMGREN, JAMES S
On an employer assignment, the assignors are typically the inventors.