SERVICE PROGRAMMABLE LOGIC ARRAYS WITH LOW TUNNEL BARRIER INTERPOLY INSULATORS

Patent №

US 7,074,673

Granted

2006-07-11

Filed 2004

Owner

Lab

AI components

2

planning · hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

10788810

Structures and methods for in service programmable logic arrays with low tunnel barrier interpoly insulators are provided. The in-service programmable logic array includes a first logic and a second logic plan having a number of logic cells arranged in rows and columns that are interconnected to produce a number of logical outputs such that the in service programmable logic array implements a logical function. The logic cell includes a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposing the channel region and is separated therefrom by a gate oxide. A control gate opposes the floating gate. The control gate is separated from the floating gate by a low tunnel barrier intergate insulator. The low tunnel barrier intergate insulator includes a metal oxide insulator selected from the group consisting of PbO, Al2O3, Ta2O5, TiO2, ZrO2, Nb2O5 and/or a Perovskite oxide tunnel barrier.

PlanningAI hardwareH10B 41/27H03K 19/17712H03K 19/1778H10B 41/23H10B 69/00H10D 30/683H10D 30/685H10D 30/6891+5 more

AI classification

AI hardware1.00
Planning0.59
Vision0.01
Natural language0.00
Machine learning0.00
Knowledge representation0.00
Evolutionary computation0.00
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