MECHANISM FOR RESOURCE ALLOCATION IN A DIGITAL SIGNAL PROCESSOR BASED ON INSTRUCTION TYPE INFORMATION AND FUNCTIONAL PRIORITY AND METHOD OF OPERATION THEREOF

Patent №

US 7,107,433

Granted

2006-09-12

Filed 2001

Owner

LIS LOGIC CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

10066147

A mechanism for resource allocation in a processor, a method of allocating resources in a processor and a digital signal processor incorporating the mechanism or the method. In one embodiment, the mechanism includes: (1) categorization logic, associated with an earlier pipeline stage, that generates instruction type information for instructions to be executed in the processor and (2) priority logic, associated with a later pipeline stage, that allocates functional units of the processor to execution of the instructions based on the instruction type information.

AI hardwareG06F 9/3836G06F 9/3838G06F 9/3854G06F 9/3858

AI classification

AI hardware0.95
Machine learning0.01
Knowledge representation0.00
Planning0.00
Natural language0.00
Evolutionary computation0.00
Vision0.00
Speech0.00

Ownership

LIS LOGIC CORPORATION

assignment · 125780425

Assignors

NGUYEN, HUNG T.

On an employer assignment, the assignors are typically the inventors.

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