Patent №
US 7,249,341
Granted
2007-07-24
Filed 2003
Owner
CALIFORNIA INSTITUTE OF TECHNOLOGY
Lab
—
AI components
2
ml · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
10728570
A method for the synthesis of multi-level combinational circuits with cyclic topologies. The techniques, applicable in logic synthesis, and in particular in the structuring phase of logic synthesis, optimize a multi-level description, introducing feedback and potentially optimizing the network.
AI classification
Machine learning0.97
AI hardware0.97
Planning0.34
Speech0.02
Natural language0.02
Knowledge representation0.00
Evolutionary computation0.00
Vision0.00
Ownership
CALIFORNIA INSTITUTE OF TECHNOLOGY
assignment · 144440316
Assignors
RIEDEL, MARCUS D., BRUCK, JEHOSHUA
On an employer assignment, the assignors are typically the inventors.
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