METHOD OF LOAD/STORE DEPENDENCIES DETECTION WITH DYNAMICALLY CHANGING ADDRESS LENGTH

Patent №

US 7,464,242

Granted

2008-12-09

Filed 2005

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

+2 more

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11050039

A method, an apparatus, and a computer program product are provided for detecting load/store dependency in a memory system by dynamically changing the address width for comparison. An incoming load/store operation must be compared to the operations in the pipeline and the queues to avoid address conflicts. Overall, the present invention introduces a cache hit or cache miss input into the load/store dependency logic. If the incoming load operation is a cache hit, then the quadword boundary address value is used for detection. If the incoming load operation is a cache miss, then the cacheline boundary address value is used for detection. This invention enhances the performance of LHS and LHR operations in a memory system.

AI hardwareG06F 12/0623G06F 9/383G06F 9/3834G06F 9/3861G06F 12/0802

AI classification

AI hardware1.00
Vision0.34
Evolutionary computation0.00
Knowledge representation0.00
Speech0.00
Natural language0.00
Machine learning0.00
Planning0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 161020103

TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

assignment · 161020106

KABUSHIKI KAISHA TOSHIBA

assignment · 161020191

Assignors

BARRICK, BRIAN DAVID, HICKS, DWAIN ALAN, RAY, DAVID SCOTT

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC