AUTOMATIC GENERATION OF TIMING CONSTRAINTS FOR THE VALIDATION/SIGNOFF OF TEST STRUCTURES

Patent №

US 7,490,307

Granted

2009-02-10

Filed 2006

Owner

LSI LOGIC CORPORATION

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11478044

An apparatus comprising a database, an input module and a software tool. The database may be configured to generate one or more database files representing a design of an integrated circuit (IC). The input module may be configured to generate one or more test structures to test predetermined portions of the design of an IC. The software tool may be configured to automatically generate test scripts to verify timing constraints of the one or more test structures.

AI classification

Planning0.86
AI hardware0.00
Knowledge representation0.00
Natural language0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00
Vision0.00

Ownership

LSI LOGIC CORPORATION

assignment · 180730334

Assignors

FORNACIARI, GIUSEPPE, LU, CAM, MAZZA, FABIO, SHEN, WILLIAM

On an employer assignment, the assignors are typically the inventors.

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